• Alessandro Barenghi, Guido M. Bertoni, Luca Breveglieri, Gerardo Pelosi, “A Fault Induction Technique based on Voltage Underfeeding with Application to Attacks against AES and RSA”, Journal of Systems and Software (JSS), Elsevier (ISSN: 0164-1212) [Accepted, to appear].

• Alessandro Barenghi, Stefano Crespi Reghizzi, Dino Mandrioli, Matteo Pradella, “Parallel Parsing of Operator Precedence Grammars” Information Processing Letters, 2013, ISSN 0020-0190

• Alessandro Barenghi, Gerardo Pelosi, and Federico Terraneo, Efficient and Cost Effective Design of Block Cipher Implementations on Embedded Devices, in International Journal of Grid and Utility Computing (IJGUC), Vol. 3, no. 3/3, 2012, pp.1-10 (ISSN online: 1741-8488, ISSN print: 1741-847X) [To appear]. PDF Draft Available

• Alessandro Barenghi, Luca Breveglieri, Israel Koren, David Naccache, Fault Injection Attacks on Cryptographic Devices: Theory, Practice and Countermeasures, vol.100, no.11, pp.3056-3076, Nov. 2012, doi: 10.1109/JPROC.2012.2188769 PDF Draft Available

• Alessandro Barenghi, Luca Breveglieri, Fabrizio De Santis, Filippo Melzani, Andrea Palomba, and Gerardo Pelosi, Design Time Engineering of Side Channel Resistant Cipher Implementations, in Theory and Practice of Cryptography Solutions for Secure Information Systems. Advances in Information Security, Privacy, and Ethics (AISPE) Book Series, pp. 134-158. IGI Global. Editors: Atilla Elçi et al., May 2013. ISBN: 978-1-466-64030-6, e-ISBN: 978-1-466-64031-3.

• Alessandro Barenghi, Elena Trichina, Fault Attacks on Stream Ciphers, chapter for an edited volume of Springer-Verlag's Information Security and Cryptography Series on Fault Analysis in Cryptography, Editors: M. Joye and M. Tunstall; ISBN 978-3-642-29655-0.
  

• Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi, Fault Attacks to Cryptoalgorithms with Low Cost Injection Technologies, chapter for an edited volume of Springer-Verlag's Information Security and Cryptography Series on Fault Analysis in Cryptography, Editors: M. Joye and M. Tunstall; ISBN 978-3-642-29655-0.
  

• Giovanni Agosta, Alessandro Barenghi, Massimo Maggi, Gerardo Pelosi, Compiler-based Side Channel Vulnerability Analysis and Optimized Countermeasures Application, Proceedings of the 50th Design Automation Conference (DAC 2013), June 2-6, 2013. Austin, Texas, USA. ACM 2013. [To Appear]

• Alessandro Barenghi, Gerardo Pelosi and Fabio Pozzi, Drop-In Control Flow Hijacking Prevention through Dynamic Library Interception, in Proceedings of the 10th International Conference on Information Technology - Software Security Track, April 15-17, 2013, Las Vegas, Nevada, USA. IEEE-CS CPS Press. [To Appear]

• Alessandro Barenghi, Francesco Regazzoni and Gerardo Pelosi, Simulation-Time Security Margin Assessment against Power-Based Side Channel Attacks, in Proceedings of the 7th Workshop on Embedded Systems Security (WESS 2012), October 12, 2012, Tampere, Finland, ACM 2012. ISBN: 978-1-4503-1286-8/12/10.

• Alessandro Barenghi, Ermes Viviani, Stefano Crespi Reghizzi, Dino Mandrioli and Matteo Pradella. PAPAGENO: a parallel parser generator for operator precedence grammars, in Proceedings of the 5th International Conference on Software Language Engineering, Dresden, Germany, September 25-28, 2012, Lecture Notes in Computer Science, volume 7745, pp 264-274, Springer, ISBN:978-3-642-36088-6. PDF Draft Avaliable

• Giovanni Agosta, Alessandro Barenghi and Gerardo Pelosi A Code Morphing Methodology to Automate Power Analysis Countermeasures, in Proceedings of the 49th Design Automation Conference (DAC), San Francisco, California, USA, 3-7 June 2012, ACM 2012. ISBN 978-1-4503-1199-1. PDF Draft Avaliable

• Giovanni Agosta, Alessandro Barenghi and Gerardo Pelosi Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KEELOQ Exhaustive Key Search Attack, in Proceedings of PARMA 2012 - 3rd Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures. 28-29 February 2012, Munich, Germany, Lecture Notes in Informatics (LNI), Series of the Gesellschaft für Informatik (GI) - Society for Computer Science, Volume P-200, pp. 385-396. Editors: Gero Mühl, Jan Richling, and Andreas Herkersdorf. ISBN 978-3-88579-294-9, ISSN 1617-5468.PDF Draft Avaliable

• Giovanni Agosta, Alessandro Barenghi, Antonio Parata, and Gerardo Pelosi, Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution, in Proceedings of The 9th International Conference on Information Technology: New Generations (ITNG 2012), Las Vegas, Nevada, USA, April 16-18, 2012. IEEE Computer Society. (ISBN 978-0-7695-4654-4) PDF Draft Avaliable

• Alessandro Barenghi, Guido M. Bertoni, Luca Breveglieri, Andrea Palomba and Gerardo Pelosi, Fault Attack to the Elliptic Curve Digital Signature Algorithm with Multiple Bit Faults, in Proceedings of The 4th International Conference on Security of Information and Networks (SIN 2011), ACM 2011, November 14-19, 2011, Sydney, Australia. Proc. ACM 2011, pp. 63-72, ISBN: 978-1-4503-1020-8.PDF Draft Avaliable

• Amir Moradi, Alessandro Barenghi, Timo Kasper and Christof Paar, On the Vulnerability of FPGA Bitstream Encryption against Power Analysis Attacks - Extracting Keys from Xilinx Virtex-II FPGAs, in Proceedings of the 18th ACM Conference on Computer and Communications Security (CCS 2011), ACM 2011, October 17-21, 2011, Chicago, IL, USA. ISBN 978-1-4503-0948-6 PDF Draft Available

• Alessandro Barenghi, Gerardo Pelosi, Security and Privacy in Smart Grid Infrastructures, in Proceedings of the 22nd Database and Expert Systems Applications (DEXA) International Workshops - 6th Workshop on Flexible Database and Information System Technology (FlexDBIST-2011), Toulouse, France, Aug. 29-Sep. 2, 2011, IEEE Computer Society. ISBN: 978-3-642-21039-6 PDF Draft Available

• Alessandro Barenghi, Guido M. Bertoni, Fabrizio De Santis,Filippo Melzani, On the efficiency of design time evaluation of the resistance to power attacks, in Proceedings of 14th Euromicro Conference on Digital System Design (DSD 2011), August 31- September 2, 2011, Oulu, Finland. ISBN 978-0-7695-4494-6 PDF Draft Available

• Alessandro Barenghi, Cédric Hocquet, David Bol, François-Xavier Standaert, Francesco Regazzoni, Israel Koren, Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-Threshold Devices through an example of a 65nm AES implementation, in Proceedings of 7th Workshop on RFID Security and Privacy (RFIDSec 2011), June 26-28, 2011, Amherst, Massachussets, USA. ISBN 978-3-642-25285-3 PDF Draft Available

• Alessandro Barenghi, Guido M. Bertoni, Andrea Palomba, Ruggero Susella, A Novel Fault Attack Against ECDSA, Best Paper Award in Proceedings of IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2011), June 5-6, 2011, San Diego, California, USA. ISBN: 978-1-4577-1059-9 PDF Draft Available

• Alessandro Barenghi, Gerardo Pelosi, Yannick Teglia, Information Leakage Discovery Techniques to Enhance Secure Chip Design, in Proceedings of the 5th Workshop in Information Security Theory and Practice (WISTP 2011) – Security and Privacy of Mobile Devices in Wireless Communication (Proc. Springer-LNCS), June 1-3, 2011, Heraklion, Crete, Greece. ISBN: 978-3-642-21039-6 PDF Draft Available

• Alessandro Barenghi, Luca Breveglieri, Israel Koren, Gerardo Pelosi, Francesco Regazzoni, Countermeasures Against Fault Attacks on Software Implemented AES: Effectiveness and Cost, in Proceedings of the 5th Workshop on Embedded Systems Security (WESS 2010), October 24, 2010, Scottsdale, AZ, USA, ACM Press and Digital Library 2010, pp. 1-10 ISBN 978-1-4503-0078-0 .PDF Draft Available

• Alessandro Barenghi, Guido M. Bertoni, Mauro Pellicioli, Gerardo Pelosi, Fault Attack on AES with Single-Bit Induced Faults, in Proceedings of The 6th International Conference on Information Assurance and Security (IAS 2010), 23–25 August 2010, Atlanta, Georgia, USA, IEEE 2010, pp. 167-172, ISBN 978-1-4244-7408-0.PDF Draft Available

• Alessandro Barenghi, Gerardo Pelosi, Yannick Teglia, Improving Differential Power Attack Through Filtering, in Proceedings of The 3rd International Conference on Security of Information and Networks (SIN 2010), ACM-SIGSAC, 7–11 September 2010, Taganrog, Rostov region, Russia, ACM Press and Digital Library 2010, pp. 124-133, ISBN 978-1-4503-0234-0.PDF Draft Available

• Alessandro Barenghi, Guido M. Bertoni, Luca Breveglieri, Mauro Pellicioli, Gerardo Pelosi, Low Voltage Fault Attacks to AES, In Proceedings of IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2010), June 13-14, 2010, Anaheim, California, USA, IEEE Computer Society 2010, pp. 7-12, ISBN 978-1-4244-7810-1.PDF Draft Available

• Giovanni Agosta, Alessandro Barenghi, Fabrizio De Santis and Gerardo Pelosi, Record Setting Software Implementation of DES Using CUDA, In Proceedings of the First International Symposium on Information Security and Privacy (ISISP 2010), Las Vegas, Nevada, USA, 12-14 April 2010, IEEE Computer Society 2010, pp. 748-755, ISBN 978-0-7695-3984-3.PDF Draft Available

• Giovanni Agosta, Alessandro Barenghi, Fabrizio De Santis, Andrea Di Biagio, Gerardo Pelosi, Fast Disk Encryption Through GPGPU Acceleration, 10-th International Conference on Parallel and Distributed Computing, Applications and Technologies, PDCAT 2009, Hiroshima, Japan, 8-11, December 2009, DOI 10.1109, IEEE Computer Society.PDF Draft Available

• Alessandro Barenghi, Guido M. Bertoni, Emanuele Parrinello, Gerardo Pelosi, Low Voltage Fault Attacks on the RSA Cryptosystem, in Proceedings of the 6-th International Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC 2009), Lausanne, Switzerland, September 6, 2009, IEEE Computer Society PDF Draft Available.

• Giovanni Agosta, Alessandro Barenghi, Andrea Di Biagio, Gerardo Pelosi, Design of a Parallel AES for Graphics Hardware using the CUDA framework, in Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS) 2009, Rome, Italy, May 29, 2009, IEEE Computer Society Press. [Track SSN 2009: 5th International Workshop on Security in Systems and Networks]PDF Draft Available

• Alessandro Barenghi, Guido Bertoni, Luca Breveglieri, Gerardo Pelosi, A FPGA Coprocessor for the Cryptographic Tate Pairing over GF(p), in Proceedings of the 5th International Conference on Information Technology: New Generations (ITNG 2008), Las Vegas, Nevada, USA, 7-9, April 2008, IEEE Computer Society. PDF Draft Available

This patent is related to the design of a system to automate the application of software side-channel countermeasures.

• Alessandro Barenghi in collaboration with Giovanni Agosta, Guido M. Bertoni. Gerardo Pelosi,Method and system for protecting electronic devices, and the related computer program products.
  Patent's applicants: Politecnico di Milano, STMicroelectronics Srl (IT).
  Chamber of Commerce of Turin
  Filed on: December 29th, 2011
  No. of deposit: TO2011A001229